UPSTREAM: drm/i915/wcl: C10 phy connected to port A and B

WCL added a c10 phy connected to port B. PTL code is currently
restricting c10 to phy_a only.

PTL doesn't have a PHY connected to PORT B; as such,there will
never be a case where PTL uses PHY B.
WCL uses PORT A and B with the C10 PHY.Reusing the condition
for WCL and extending it for PORT B should not cause any issues
for PTL.

-v2: Reuse and extend PTL condition for WCL (Matt)

Bug: 424451528
Test: Boot to UI on ocelot
(cherry picked from commit 9d10de78)

Bspec: 73944
Change-Id: Idfc240c1d608701bfb7c401c4bf210c7a465b224
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20250613193146.3549862-9-dnyaneshwar.bhadane@intel.com


Signed-off-by: FNU VISHWANATHA <fnu.vishwanatha@intel.corp-partner.google.com>