drm/i2c: adv7511: Change DSI lanes dynamically
Lower modes on ADV7511 require lower number of lanes for correct
operation. Switch lanes to 3 when the target mode's pixel clock
is less than 80 Mhz.
Based on patch by Andy Green <andy.green@linaro.org>
Signed-off-by:
Archit Taneja <architt@codeaurora.org>
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