Commit 3c05eb37 authored by Sricharan R's avatar Sricharan R
Browse files

Docs: dt: document ARM SMMU clocks/powerdomains bindings



Document the list of clocks and powerdomains required for the
smmu's register and bus access.

Signed-off-by: default avatarSricharan R <sricharan@codeaurora.org>
parent 7b27e8f9
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please to comment