UPSTREAM: drm/i915/display: update pll values in sync with Bspec for MTL

DP/eDP and HDMI C20 PHY PLL values were updated for MTL platform

Signed-off-by: Ravi Kumar Vodapalli <ravi.kumar.vodapalli@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240214070930.1028456-1-ravi.kumar.vodapalli@intel.com


(cherry picked from commit d9b904d2)
Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>

BUG=b:366539867
TEST=DP-ALT displays should work fine

Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/5875368


Reviewed-by: Sean Paul <sean@poorly.run>
Tested-by: Shawn C Lee <shawn.c.lee@intel.com>
Commit-Queue: Shawn C Lee <shawn.c.lee@intel.com>
Reviewed-by: Drew Davenport <ddavenport@chromium.org>
Change-Id: I64511073960543d302e796fa9357a1d5868896c3
Signed-off-by: Hubert Mazur <hmazur@google.com>
Signed-off-by: Tomasz Nowicki <tnowicki@google.com>