BACKPORT: PCI: dwc: Support multiple ATU memory regions

The current ATU setup only supports a single memory resource which
isn't sufficient if there are also prefetchable memory regions. In order
to support multiple memory regions, we need to move away from fixed ATU
slots and rework the assignment. As there's always an ATU entry for
config space, let's assign index 0 to config space. Then we assign
memory resources to index 1 and up. Finally, if we have an I/O region
and slots remaining, we assign the I/O region last. If there aren't
remaining slots, we keep the same config and I/O space sharing.

Bug: 268559201

Link: https://lore.kernel.org/r/20201026181652.418729-1-robh@kernel.org


Tested-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Vidya Sagar <vidyas@nvidia.com>
Acked-by: Jingoo Han <jingoohan1@gmail.com>
Cc: Vidya Sagar <vidyas@nvidia.com>
Cc: Jingoo Han <jingoohan1@gmail.com>
Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Change-Id: Ib945de723c29a80f055227474a01806283bd1873
(cherry picked from commit 9f9e59a4)
[Revert the struct change to keep KMI and setting DWC_IATU_IOCFG_SHARED
in a vendor hook so that not to affect vendor modules not use it]
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>