Commit f3d71968 authored by Laurentiu Tudor's avatar Laurentiu Tudor Committed by Treehugger Robot
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UPSTREAM: iommu: Map reserved memory as cacheable if device is coherent



Check if the device is marked as DMA coherent in the DT and if so,
map its reserved memory as cacheable in the IOMMU.
This fixes the recently added IOMMU reserved memory support which
uses IOMMU_RESV_DIRECT without properly building the PROT for the
mapping.

Bug: 254441685
Fixes: a5bf3cfc ("iommu: Implement of_iommu_get_resv_regions()")
Signed-off-by: default avatarLaurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: default avatarJason Gunthorpe <jgg@nvidia.com>
Acked-by: default avatarThierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20230926152600.8749-1-laurentiu.tudor@nxp.com


Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
(cherry picked from commit f1aad9df)
Signed-off-by: default avatarLee Jones <joneslee@google.com>
Change-Id: Ic6738822da32e134af9dd3ed5737e611dffe85c9
parent 7d59065a
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