UPSTREAM: drm/xe/pf: Sanitize VF scratch registers on FLR

[ Upstream commit 13a48a0f ]

Some VF accessible registers (like GuC scratch registers) must be
explicitly reset during the FLR. While this is today done by the GuC
firmware, according to the design, this should be responsibility of
the PF driver, as future platforms may require more registers to be
reset. Likewise GuC, the PF can access VFs registers by adding some
platform specific offset to the original register address.

Change-Id: I9add6619e21272a725aff6421273abfb129cdcfe
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Piotr Piórkowski <piotr.piorkowski@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240902192953.1792-1-michal.wajdeczko@intel.com


Stable-dep-of: 81dccec4 ("drm/xe/pf: Prepare to stop SR-IOV support prior GT reset")
Signed-off-by: Sasha Levin <sashal@kernel.org>
(cherry picked from commit abe59c53)
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>