ARM: dts: DRA72x: Add sub-mailbox nodes for all PRUSS1 & PRUSS2

Add the reference sub-mailbox nodes to communicate between MPU and
the PRU remote processor cores within the PRUSS1 and PRUSS2 processor
subsystems in AM571x SoC. Each PRUSS has two PRU cores, so one
sub-mailbox node is used per MPU-PRU.

The following are the assignments of mailbox fifos between MPU and
the remote PRU cores in each PRUSS:

                MPU Tx/PRU Rx   MPU Rx/PRU Tx
        PRU0    0               1
        PRU1    2               3

Mailbox 3 is utilized to communicate between MPU and PRUSS1, while
Mailbox 4 is used between MPU and PRUSS2. The PRUSS crossbar is
expected to be setup properly on the firmware side to achieve proper
communication as the Mailbox interrupts are not mapped to any of the
existing PRU events by default.

All these sub-mailbox nodes are left in disabled state, and should
be enabled (and maybe modified) as per the individual product
configuration in the corresponding board dts files. These are identical
to the configuration used on AM572x SoCs.

Tested-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>