arm64: dts: rockchip: Fix PCIe3 handling for Edgeble-6TOPS Modules

The Edgeble 6TOPS modules has configured the PCIe3.0 with
- 2 lanes on Port1 of pcie3x2 controller for M.2 M-Key
- 2 lanes on Port0 of pcie3x4 controller for B and E-Key

The, current DT uses opposite controller nodes that indeed uses
incorrect reset, regulator nodes.

The configuration also uses refclk oscillator that need to enable
explicitly in DT to avoid the probe hang on while reading DBI.

So, this patch fixes all these essential issues and make this PCIe work
properly.

Issues fixed are,
- Fix the associate controller nodes for M and B, E-Key
- Fix the reset gpio handlings
- Fix the regulator handlings and naming convensions
- Support pcie_refclk oscillator

Fixes: 92eaee21 ("arm64: dts: rockchip: Add Edgeble NCM6A-IO M.2 B-Key, E-Key")
Fixes: 5d85d4c7 ("arm64: dts: rockchip: Add Edgeble NCM6A-IO M.2 M-Key")
Reported-by: Mitchell Ma <machuang@radxa.com>
Co-developed-by: Mitchell Ma <machuang@radxa.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20241221151758.345257-1-jagan@edgeble.ai


Signed-off-by: Heiko Stuebner <heiko@sntech.de>