Commit d31d50b3 authored by Chang S. Bae's avatar Chang S. Bae Committed by Greg Kroah-Hartman
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x86/microcode/intel: Remove unnecessary cache writeback and invalidation



commit 9a819753 upstream

Currently, an unconditional cache flush is performed during every
microcode update. Although the original changelog did not mention
a specific erratum, this measure was primarily intended to address
a specific microcode bug, the load of which has already been blocked by
is_blacklisted(). Therefore, this cache flush is no longer necessary.

Additionally, the side effects of doing this have been overlooked. It
increases CPU rendezvous time during late loading, where the cache flush
takes between 1x to 3.5x longer than the actual microcode update.

Remove native_wbinvd() and update the erratum name to align with the
latest errata documentation, document ID 334163 Version 022US.

  [ bp: Zap the flaky documentation URL. ]

Fixes: 91df9fdf ("x86/microcode/intel: Writeback and invalidate caches before updating microcode")
Reported-by: default avatarYan Hua Wu <yanhua1.wu@intel.com>
Reported-by: default avatarWilliam Xie <william.xie@intel.com>
Signed-off-by: default avatarChang S. Bae <chang.seok.bae@intel.com>
Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Acked-by: default avatarAshok Raj <ashok.raj@intel.com>
Tested-by: default avatarYan Hua Wu <yanhua1.wu@intel.com>
Link: https://lore.kernel.org/r/20241001161042.465584-2-chang.seok.bae@intel.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 9b86a44e
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