Unverified Commit cce2200d authored by Miquel Raynal's avatar Miquel Raynal Committed by Mark Brown
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spi: cadence-qspi: Improve spi memory performance



I do not know the controller enough to really understand what is
happening under the hood, but most of the supported IPs just disable
direct access without explicit reason.

In practice we observe a significant speed improvement when using
indirect mode, some kind of direct mapping, instead of DAC, Direct
ACcess. Add the relevant quirk for all boards with the same
defaults as AM654 to use INDAC (INDirect ACcess) instead.

Speed tests show no change on the write speed on a SPI NAND chip clocked
at 25MHz on the AM62A LP SK, but a read speed jumping from 3500kiB/s up
to more than 10000kiB/s (approximately x3).

Signed-off-by: default avatarMiquel Raynal <miquel.raynal@bootlin.com>
Link: https://patch.msgid.link/20250305200933.2512925-3-miquel.raynal@bootlin.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent b8665a1b
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