clk: samsung: gs101: fix alternate mout_hsi0_usb20_ref parent clock

The alternate parent clock for this mux is mout_pll_usb, not the pll
itself.

Fixes: 1891e4d4 ("clk: samsung: gs101: add support for cmu_hsi0")
Cc: stable@vger.kernel.org
Signed-off-by: André Draszik <andre.draszik@linaro.org>
Link: https://lore.kernel.org/r/20250603-samsung-clk-fixes-v1-2-49daf1ff4592@linaro.org


Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>