Commit a923705c authored by Kefeng Wang's avatar Kefeng Wang Committed by Catalin Marinas
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arm64: optimize flush tlb kernel range



Currently the kernel TLBs is flushed page by page if the target
VA range is less than MAX_DVM_OPS * PAGE_SIZE, otherwise we'll
brutally issue a TLBI ALL.

But we could optimize it when CPU supports TLB range operations,
convert to use __flush_tlb_range_op() like other tlb range flush
to improve performance.

Co-developed-by: default avatarYicong Yang <yangyicong@hisilicon.com>
Signed-off-by: default avatarYicong Yang <yangyicong@hisilicon.com>
Signed-off-by: default avatarKefeng Wang <wangkefeng.wang@huawei.com>
Reviewed-by: default avatarAnshuman Khandual <anshuman.khandual@arm.com>
Link: https://lore.kernel.org/r/20240923131351.713304-3-wangkefeng.wang@huawei.com


Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 7ffc13e2
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