Commit a02a8f8c authored by Vladimir Zapolskiy's avatar Vladimir Zapolskiy Committed by Bjorn Andersson
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dt-bindings: clock: qcom,sm8450-camcc: Allow to specify two power domains



To configure the camera PLLs and enable the camera GDSCs on SM8450, SM8475,
SM8550 and SM8650 platforms, the MXC rail must be ON along with MMCX.
Therefore, update the camcc bindings to include the MXC power domain on
these platforms.

Fixes: 9cbc6474 ("dt-bindings: clock: qcom: Add SM8550 camera clock controller")
Signed-off-by: default avatarVladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: default avatarBryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: default avatarJagadeesh Kona <quic_jkona@quicinc.com>
Link: https://lore.kernel.org/r/20250530-videocc-pll-multi-pd-voting-v5-2-02303b3a582d@quicinc.com


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 1a42f4d4
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