Commit 9c851585 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
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clk: renesas: r8a779h0: Add SCIF clocks 



Add the module clocks used by the Serial Communication Interfaces with
FIFO (SCIF) on the Renesas R-Car V4M (R8A779H0) SoC.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/82d731edd4ae4a8cd7683368131095777f4fa172.1709741224.git.geert+renesas@glider.be
parent e56321e4
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