drm/amdgpu: Add core reset registers for JPEG5_0_1
Add core reset control register definitions and align all prior register definitions to end at 100 column length for uniformity. Signed-off-by:Sathishkumar S <sathishkumar.sundararaju@amd.com> Reviewed-by:
Leo Liu <leo.liu@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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