cxl: Add extended linear cache address alias emission for cxl events

Add the aliased address of extended linear cache when emitting event
trace for poison, DRAM and general media of CXL events.

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Li Ming <ming.li@zohomail.com>
Reviewed-by: Alison Schofield <alison.schofield@intel.com>
Link: https://patch.msgid.link/20250226162224.3633792-4-dave.jiang@intel.com


Signed-off-by: Dave Jiang <dave.jiang@intel.com>