UPSTREAM: drm/i915/display: Support PSR entry VSC packet to be transmitted one frame earlier

Display driver shall read DPCD 00071h[3:1] during configuration
to get PSR setup time. This register provides the setup time
requirement on the VSC SDP entry packet. If setup time cannot be
met with the current timings
(e.g., PSR setup time + other blanking requirements > blanking time),
driver should enable sending VSC SDP one frame earlier before sending
the capture frame.

BSpec: 69895 (PSR Entry Setup Frames 17:16)

v2: Write frames before su entry to correct register (Ville, Jouni)
    Move frames before su entry calculation to it's
    own function (Ville, Jouni)
    Rename PSR Entry Setup Frames register to indicate
    Lunarlake specificity (Jouni)
v3: Modify setup entry frames calculation function to
    return the actual frames (Ville)
    Match comment with actual implementation (Jouni)
v4: Drop "set" from function naming (Jouni, Ville)
    Use i915 instead of dev_priv (Jouni)

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231106114228.146574-1-mika.kahola@intel.com


(cherry picked from commit 2b981d57)

BUG=b:308455498
TEST=Verify Asus PG32UQXR 4K160 mode on Rex using Big Joiner

Change-Id: I273d2f6beba05db7508333da483b0ff267793a7b
Signed-off-by: Rakshith M O <rakshith.m.o@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/5802777


Reviewed-by: Manasi Navare <navaremanasi@chromium.org>
Signed-off-by: Hubert Mazur <hmazur@google.com>