Commit 7d54f52d authored by Zong-Zhe Yang's avatar Zong-Zhe Yang Committed by Greg Kroah-Hartman
Browse files

rtw88: fix RX clock gate setting while fifo dump



[ Upstream commit c5a8e907 ]

When fw fifo dumps, RX clock gating should be disabled to avoid
something unexpected. However, the register operation ran into
a mistake. So, we fix it.

Signed-off-by: default avatarZong-Zhe Yang <kevin_yang@realtek.com>
Signed-off-by: default avatarPing-Ke Shih <pkshih@realtek.com>
Signed-off-by: default avatarKalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20210927111830.5354-1-pkshih@realtek.com


Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent d506a3d6
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please to comment