UPSTREAM: drm/i915/display: Ensure we have "Frame Change" event in DSB commit

We may have commit which doesn't have any non-arming plane register
writes. In that case there aren't "Frame Change" event before DSB vblank
evasion which hangs as PIPEDSL register is reading as 0 when PSR state is
SRDENT(PSR1) or DEEP_SLEEP(PSR2). Handle this by ensuring "Frame Change"
event at the begin of DSB commit if using PSR/PR.

v3: dsb_commit as a first parameter
v2: use intel_psr_trigger_frame_change_event

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250213064804.2077127-13-jouni.hogander@intel.com


(cherry picked from commit ac76a51d)

Bug: 432032023
Test: None
Change-Id: I39d4bafb61fb4ee71cabe716384e5c8926c6b055
Signed-off-by: Ap, Kamal <kamal.ap@intel.corp-partner.google.com>