drm/msm/dpu: Add handling of LM_6 and LM_7 bits in pending flush mask
MDSS/MDP v12 comes with new bits in flush registers (e.g. MDP_CTL_0_FLUSH) for Layer Mixer 6 and 7. Reviewed-by:Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by:
Jessica Zhang <quic_jesszhan@quicinc.com> Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/651260/ Link: https://lore.kernel.org/r/20250430-b4-sm8750-display-v5-13-8cab30c3e4df@linaro.org Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
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