iommu/omap: flush page table entries from L2 cache

The functions flush_iopgd_range() and flush_iopte_range()
are not performing any L2 cache operations when flushing
the MMU page table entries. This has resulted in unnecessary
MMU faults on the DSP and IPU processors on OMAP4 (not seen
on OMAP5 though due to the L2 cache differences). Fix this
by adding proper outer cache operations. The asm instruction
used for the inner cache has also been replaced with an
appropriate API.

NOTE:
This is a temporary patch and an up-port of an older product
version patch. The usage of dmac_flush_range() API is in
general frowned upon outside the dma-mapping layer, but some
usage already exists within the IOMMU drivers.

Signed-off-by: Ramesh Gupta <grgupta@ti.com>
Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com>
[s-anna@ti.com: add commit description]
Signed-off-by: Suman Anna <s-anna@ti.com>