ANDROID: ABI: Add clk/power related symbols for imx

68 function symbol(s) added
  'struct clk_hw* __clk_hw_register_divider(struct device*, struct device_node*, const char*, const char*, const struct clk_hw*, const struct clk_parent_data*, unsigned long, void*, u8, u8, u8, const struct clk_div_table*, spinlock_t*)'
  'struct clk_hw* __clk_hw_register_fixed_rate(struct device*, struct device_node*, const char*, const char*, const struct clk_hw*, const struct clk_parent_data*, unsigned long, unsigned long, unsigned long, unsigned long, bool)'
  'struct clk_hw* __clk_hw_register_gate(struct device*, struct device_node*, const char*, const char*, const struct clk_hw*, const struct clk_parent_data*, unsigned long, void*, u8, u8, spinlock_t*)'
  'struct clk_hw* __clk_hw_register_mux(struct device*, struct device_node*, const char*, u8, const char* const*, const struct clk_hw**, const struct clk_parent_data*, unsigned long, void*, u8, u32, u8, const u32*, spinlock_t*)'
  'int __of_mdiobus_register(struct mii_bus*, struct device_node*, struct module*)'
  'int clk_bulk_get(struct device*, int, struct clk_bulk_data*)'
  'void clk_bulk_put(int, struct clk_bulk_data*)'
  'int clk_gate_is_enabled(struct clk_hw*)'
  'struct clk_hw* clk_hw_register_composite(struct device*, const char*, const char* const*, int, struct clk_hw*, const struct clk_ops*, struct clk_hw*, const struct clk_ops*, struct clk_hw*, const struct clk_ops*, unsigned long)'
  'struct clk_hw* clk_hw_register_fixed_factor(struct device*, const char*, const char*, unsigned long, unsigned int, unsigned int)'
  'unsigned int clk_mux_index_to_val(const u32*, unsigned int, u8)'
  'struct clk* clk_register_mux_table(struct device*, const char*, const char* const*, u8, unsigned long, void*, u8, u32, u8, const u32*, spinlock_t*)'
  'void clk_unregister(struct clk*)'
  'unsigned int cpufreq_generic_get(unsigned int)'
  'int cpufreq_generic_suspend(struct cpufreq_policy*)'
  'void dev_pm_opp_free_cpufreq_table(struct device*, struct cpufreq_frequency_table**)'
  'unsigned long dev_pm_opp_get_max_transition_latency(struct device*)'
  'int dev_pm_opp_get_sharing_cpus(struct device*, struct cpumask*)'
  'unsigned long dev_pm_opp_get_suspend_opp_freq(struct device*)'
  'int dev_pm_opp_init_cpufreq_table(struct device*, struct cpufreq_frequency_table**)'
  'int dev_pm_opp_of_cpumask_add_table(const struct cpumask*)'
  'int dev_pm_opp_of_get_sharing_cpus(struct device*, struct cpumask*)'
  'int devm_hwrng_register(struct device*, struct hwrng*)'
  'int dmaenginem_async_device_register(struct dma_device*)'
  'int dw_pcie_ep_init(struct dw_pcie_ep*)'
  'int dw_pcie_ep_raise_legacy_irq(struct dw_pcie_ep*, u8)'
  'int dw_pcie_ep_raise_msi_irq(struct dw_pcie_ep*, u8, u8)'
  'void dw_pcie_ep_reset_bar(struct dw_pcie*, enum pci_barno)'
  'u8 dw_pcie_find_capability(struct dw_pcie*, u8)'
  'u32 dw_pcie_read_dbi(struct dw_pcie*, u32, size_t)'
  'int dw_pcie_wait_for_link(struct dw_pcie*)'
  'void dw_pcie_write_dbi(struct dw_pcie*, u32, size_t, u32)'
  'bool mdiobus_is_registered_device(struct mii_bus*, int)'
  'void net_selftest(struct net_device*, struct ethtool_test*, u64*)'
  'int net_selftest_get_count()'
  'void net_selftest_get_strings(u8*)'
  'void netif_set_tso_max_segs(struct net_device*, unsigned int)'
  'int nvmem_cell_read_u64(struct device*, const char*, u64*)'
  'int of_clk_parent_fill(struct device_node*, const char**, unsigned int)'
  'int of_genpd_add_device(struct of_phandle_args*, struct device*)'
  'int of_genpd_add_subdomain(struct of_phandle_args*, struct of_phandle_args*)'
  'int of_get_phy_mode(struct device_node*, phy_interface_t*)'
  'struct phy_device* of_phy_connect(struct net_device*, struct device_node*, void(*)(struct net_device*), u32, phy_interface_t)'
  'void of_phy_deregister_fixed_link(struct device_node*)'
  'struct phy_device* of_phy_find_device(struct device_node*)'
  'int of_phy_register_fixed_link(struct device_node*)'
  'int pci_msi_enabled()'
  'struct phy_device* phy_connect(struct net_device*, const char*, void(*)(struct net_device*), phy_interface_t)'
  'void phy_disconnect(struct phy_device*)'
  'int phy_ethtool_get_eee(struct phy_device*, struct ethtool_eee*)'
  'int phy_ethtool_get_link_ksettings(struct net_device*, struct ethtool_link_ksettings*)'
  'int phy_ethtool_nway_reset(struct net_device*)'
  'int phy_ethtool_set_eee(struct phy_device*, struct ethtool_eee*)'
  'int phy_ethtool_set_link_ksettings(struct net_device*, const struct ethtool_link_ksettings*)'
  'int phy_mii_ioctl(struct phy_device*, struct ifreq*, int)'
  'void phy_print_status(struct phy_device*)'
  'void phy_remove_link_mode(struct phy_device*, u32)'
  'int phy_reset_after_clk_enable(struct phy_device*)'
  'void phy_set_max_speed(struct phy_device*, u32)'
  'void phy_set_sym_pause(struct phy_device*, bool, bool, bool)'
  'void phy_start(struct phy_device*)'
  'void phy_stop(struct phy_device*)'
  'void phy_support_sym_pause(struct phy_device*)'
  'int pm_genpd_remove_device(struct device*)'
  'void tso_build_data(const struct sk_buff*, struct tso_t*, int)'
  'void tso_build_hdr(const struct sk_buff*, char*, struct tso_t*, int, bool)'
  'int tso_count_descs(const struct sk_buff*)'
  'int tso_start(struct sk_buff*, struct tso_t*)'

8 variable symbol(s) added
  'const struct clk_ops clk_divider_ops'
  'const struct clk_ops clk_divider_ro_ops'
  'const struct clk_ops clk_fractional_divider_ops'
  'const struct clk_ops clk_gate_ops'
  'const struct clk_ops clk_mux_ops'
  'const struct clk_ops clk_mux_ro_ops'
  'struct kobject* firmware_kobj'
  'struct device_node* of_chosen'

Bug: 277791334
Change-Id: Ide2e8e1be03d8978476ddbdcd32a9d364ea8814f
Signed-off-by: Zhipeng Wang <zhipeng.wang_1@nxp.com>