Commit 50f0cbd5 authored by Cong Dang's avatar Cong Dang Committed by Geert Uytterhoeven
Browse files

clk: renesas: r8a779h0: Add MSIOF clocks 



Add the module clocks used by the Clock-Synchronized Serial Interfaces
with FIFO (MSIOF) on the Renesas R-Car V4M (R8A779H0) SoC.

Signed-off-by: default avatarCong Dang <cong.dang.xn@renesas.com>
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/86ce05ae274d384c5221bd136415a7b0a1579592.1713279332.git.geert+renesas@glider.be
parent 3b23118b
Show whitespace changes
Inline Side-by-side
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Please to comment