Commit 4a60c55b authored by Tim Huang's avatar Tim Huang Committed by Alex Deucher
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drm/amdgpu: fix incorrect active RB bitmap in setup RBs 



The RB bitmap width per SA may be 0x1 for some ASICs.
Use the actual bitmap of SA instead of 0x3 to determine
the active RB bitmap.

Signed-off-by: default avatarTim Huang <tim.huang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 62498e79
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