Commit 48d2c6de authored by Taniya Das's avatar Taniya Das Committed by Bjorn Andersson
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clk: qcom: clk-alpha-pll: Add support for dynamic update for slewing PLLs



The alpha PLLs which slew to a new frequency at runtime would require
the PLL to calibrate at the mid point of the VCO. Add the new PLL ops
which can support the slewing of the PLL to a new frequency.

Reviewed-by: default avatarImran Shaik <quic_imrashai@quicinc.com>
Signed-off-by: default avatarTaniya Das <quic_tdas@quicinc.com>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250702-qcs615-mm-v10-clock-controllers-v11-1-9c216e1615ab@quicinc.com


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent f6a4a55a
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