Commit 308ffb0d authored by Suman Anna's avatar Suman Anna
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ARM: dts: DRA7: Add L1P and L1D RAMs to DSP1 node



The L1P RAM and L1D RAM data has been added to the DSP1 node
through the 'reg' and 'reg-names' properties. The L2RAM data
was already defined previously.

Signed-off-by: default avatarSuman Anna <s-anna@ti.com>
parent ef7752f9
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