Commit 2d0f973b authored by Bartosz Wawrzyniak's avatar Bartosz Wawrzyniak Committed by Vinod Koul
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phy: cadence: Sierra: Fix offset of DEQ open eye algorithm control register 



Fix the value of SIERRA_DEQ_OPENEYE_CTRL_PREG and add a definition for
SIERRA_DEQ_TAU_EPIOFFSET_MODE_PREG. This fixes the SGMII single link
register configuration.

Fixes: 7a5ad9b4 ("phy: cadence: Sierra: Update single link PCIe register configuration")
Signed-off-by: default avatarBartosz Wawrzyniak <bwawrzyn@cisco.com>
Link: https://lore.kernel.org/r/20241003123405.1101157-1-bwawrzyn@cisco.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent cb4c7df5
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