FROMGIT: KVM: arm64: Add handling of AArch32 PCMEID{2,3} PMUv3 registers

Despite advertising support for AArch32 PMUv3p1, we fail to handle
the PMCEID{2,3} registers, which conveniently alias with the top
bits of PMCEID{0,1}_EL1.

Implement these registers with the usual AA32(HI/LO) aliasing
mechanism.

Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
(cherry picked from commit 99b6a401
 git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm.git

 next)
Signed-off-by: Will Deacon <willdeacon@google.com>
Change-Id: I4f5777a65a12f4e3c66b6511707478d0f5d3508c
Bug: 178098380
Test: atest VirtualizationHostTestCases on an EL2-enabled device