Commit 18a5bf00 authored by Nitheesh Sekar's avatar Nitheesh Sekar Committed by Bjorn Andersson
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arm64: dts: qcom: ipq5018: Add PCIe related nodes



Add phy and controller nodes for a 2-lane Gen2 and
a 1-lane Gen2 PCIe bus. IPQ5018 has 8 MSI SPI interrupts and
one global interrupt.

NOTE: the PCIe controller supports gen3, yet the phy is limited to gen2.

Signed-off-by: default avatarNitheesh Sekar <quic_nsekar@quicinc.com>
Signed-off-by: default avatarSricharan R <quic_srichara@quicinc.com>
Reviewed-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: default avatarGeorge Moussalem <george.moussalem@outlook.com>
Link: https://lore.kernel.org/r/20250514-ipq5018-pcie-v10-1-5b42a8eff7ea@outlook.com


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 29521742
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