pwm: axi-pwmgen: Enable FORCE_ALIGN by default

Enable the FORCE_ALIGN flag by default in the AXI PWMGEN driver. This
flag makes the behavior of the PWM output consistent with the
description at the top of the driver file.

    * Limitations:
    * - The writes to registers for period and duty are shadowed until
    *   LOAD_CONFIG is written to AXI_PWMGEN_REG_RSTN, at which point
    *   they take effect.
    * - Writing LOAD_CONFIG also has the effect of re-synchronizing all
    *   enabled channels, which could cause glitching on other channels. It
    *   is therefore expected that channels are assigned harmonic periods
    *   and all have a single user coordinating this.

Without this flag, the PWM output does not change until the period of
all PWM output channels has run out, which makes the PWM impossible to
use in some cases because it takes too long to change the output.

Signed-off-by: David Lechner <dlechner@baylibre.com>
Reviewed-by: Nuno Sa <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20241009-pwm-axi-pwmgen-enable-force_align-v1-2-5d6ad8cbf5b4@baylibre.com


Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>