UPSTREAM: coresight: tmc: Don't enable TMC when it's not ready.

If TMC ETR is enabled without being ready, in later use we may
see AXI bus errors caused by accessing invalid addresses.

Bug: 256184860
Bug: 328316316
Change-Id: I9c0b8c7af63a2e2e7469a8537bc721ec6ae6679c
Signed-off-by: Yabin Cui <yabinc@google.com>
[ Tweak error message ]
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230127231001.1920947-1-yabinc@google.com
(cherry picked from commit 669c4614)