Commit 13113f75 authored by Abin Joseph's avatar Abin Joseph Committed by Vinod Koul
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dmaengine: zynqmp_dma: Add support for AMD Versal Gen 2 DMA IP



ZynqMP DMA IP and AMD Versal Gen 2 DMA IP are similar but have different
interrupt register offset. Create a dedicated compatible string to
support Versal Gen 2 DMA IP with Irq register offset for interrupt
Enable/Disable/Status/Mask functionality.

Signed-off-by: default avatarAbin Joseph <abin.joseph@amd.com>
Reviewed-by: default avatarRadhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Link: https://lore.kernel.org/r/20240808100024.317497-3-abin.joseph@amd.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 36545c6a
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