Commit 04aa999e authored by Conor Dooley's avatar Conor Dooley Committed by Bjorn Helgaas
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dt-bindings: PCI: microchip,pcie-host: Allow dma-noncoherent

PolarFire SoC may be configured in a way that requires non-coherent DMA
handling. On RISC-V, buses are coherent by default & the dma-noncoherent
property is required to denote buses or devices that are non-coherent.

Link: https://lore.kernel.org/r/20241011140043.1250030-4-daire.mcnamara@microchip.com


Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>
Signed-off-by: default avatarDaire McNamara <daire.mcnamara@microchip.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
parent 1390a33b
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