arm64: dts: renesas: rzg3s-smarc-som: Enable SDHI2

Add SDHI2 to RZ/G3S Smarc SoM.  SDHI2 pins are multiplexed with SCIF1,
SSI0, IRQ0, IRQ1.  The selection b/w SDHI2 and SCIF1, SSI0, IRQ0, IRQ1
is done with a switch button.  To be able to select b/w these a
compilation flag has been added (SW_SD2_EN) at the moment being
instantiated to select SDHI2.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20231016105344.294096-2-claudiu.beznea.uj@bp.renesas.com


Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>