Commit c6d76857 authored by Shubhraprakash Das's avatar Shubhraprakash Das Committed by Harsh Vardhan Dwivedi
Browse files

msm: kgsl: Add a barrier after writing to V2PUR register 



Add a memory barrier after writing to V2PUR register of IOMMU. Without
this barrier the CPU core can stall because of multiple outstanding IOMMU
register transactions happening in parallel. This barrier synchronizes
the multiple IOMMU register transactions and prevents the CPU from
stalling.

Change-Id: I1d715e9fb8287b1f0b009b39b11b5469ab8861c8
Signed-off-by: default avatarShubhraprakash Das <sadas@codeaurora.org>
parent 046036ab
Show whitespace changes
Inline Side-by-side
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Please to comment