EHCI: HSIC: improve port resume handling
This patch does the following to ensure that port is resumed
properly and SOF are sent with in 3 msec after the port resume
completion.
1. Use relaxed variants of readl and writel functions to access
registers in the resume critical path to avoid any delays introduced
by barriers.
2. Use ktime based checks to see if controller is started with in 3
msec after port resume is completed. These checks will catch the
cases where there is some delay between port resume and GPT timers
programming.
3. There is no good in polling for PORT_RESUME bit to be cleared.
Controller clears it after ~21 msec. Give 22 msec delay after port
resume and start the controller. Also add a ktime basec check to see
if controller is started with in 3 msec after port resume is completed.
If this timing is not met, perform the tight loop sequence again at
most 3 times.
CRs-Fixed: 553845
Change-Id: I29eab2fa0f684d91e1ac52d14faaffde1113b79b
Signed-off-by:
Pavankumar Kondeti <pkondeti@codeaurora.org>
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