USB: OTG: msm: Handle alt_core_clk missing case

The USB alt_core_clk is only enabled during reset sequence, since PHY
does not supply it during the reset and link needed a free running clock
during the reset. This clock is not present on SoCs, where link uses
an asynchronous reset methodology.

Change-Id: I124e705c6e2d26fc2c7fccc1877e2c80e1e8e945
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>