FROMGIT: drm/amd/display: Set DFS bypass flags for dce110

[Why]

While there is support for using and quering DFS bypass clocks the
hardware is never notified to enter DFS bypass mode for dce110.

[How]

Add a flag that can be set when programming the display engine PLL
to enable DFS bypass mode. If this flag is set then the hardware is
notified to enter DFS bypass mode and the correct display engine clock
frequency can be acquired.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

(cherry picked from commit 4e60536d
    git://anongit.freedesktop.org/drm/drm of origin/drm-next branch)

    BUG=b:117659336
    TEST=Build & Boot on Careena

Change-Id: I5aa51be93842323ffa5dfd1bf507fb292fcff00f
Reviewed-on: https://chromium-review.googlesource.com/1294549


Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Hang Zhou <hang.zhou@amd.corp-partner.google.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>