Commit 490d20c2 authored by Abhimanyu Kapur's avatar Abhimanyu Kapur Committed by QuIC Gerrit Code Review
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msm: 9625: Add support for the external L2 controller 



The 9625 chipset has an external L2 cache controller; add support for it
to the device tree and board config.

Change-Id: I900aa28ded4dc6968c5305f9b5a31aa44d2f9774
Signed-off-by: default avatarAbhimanyu Kapur <abhimany@codeaurora.org>
parent 987f40bd
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