Commit 23441d86 authored by Huaibin Yang's avatar Huaibin Yang Committed by Sudhir Sharma
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msm: display: increase max mdp clock to 266.667MHz 



The current 8064 frequency plan supports max mdp clk up to 266.667MHz.

CRs-Fixed: 405103
Change-Id: I326f5becc642399a4a0e9d97752d893752388066
Signed-off-by: default avatarHuaibin Yang <huaibiny@codeaurora.org>
(cherry picked from commit 861c6cef982df9a72a0901853aef65c48c631cc9)
parent b91ff2af
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