msm: camera: optimize csiphy setting

Remove csiphy configuration of phy data lane control
registers and phy clock lane control registers that sets
default value. Tune csiphy configuration of phy data lane
control 2 for reducing LP CLK positioning

The change is to set back to default values, which is
recommended. Also, MIPI clk and data setting is matched in
this patch. Although the discrepancy won't hurt the current
POR camera sensors and most of camera sensors, this patch is
recommended in order to avoid future issue.

Change-Id: I09c9de674d4c6f885489060232519f4812fb8cc1
Signed-off-by: Hody Hung <hhung@codeaurora.org>