mmc: msm_sdcc: use DATA_PEND bit for write opration

DATA_PEND bit is designed to be used with CMD24 and CMD25
(WRITE_SINGLE_BLOCK and WRITE_MULTIPLE_BLOCK) to automatically
start the DPSM after a normal (non-error) response is received.
MCI_DATA_CTL should be written with the enable bit and the pending
bit asserted before MCI_CMD is enabled.

As of now driver is not using the DATA_PEND bit register for write
operation. For write operation, driver first sends the write command
to card and then waits for the CMD_RESPOND_END and once interrupt is
received, driver configures ADM/BAM and DATA_CTL register
(with ENABLE bit set) in interrupt context.

Driver can use DATA_PEND bit for SD card write operation. So basically
this would be the sequence of configuration:
	1. Configure ADM/BAM
	2. Configure DATA_CTL with DATA_PEND and ENABLE bit set
	3. Configure CMD register for sending the write command.

All of the above configuration will now happen in thread context.

CRs-fixed: 311787
Change-Id: I5caa7e61413e53f58e067888f9cf1cfffae3dbd6
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>