usb: msm7k_udc: Add delay upon request dequeue failure

A delay is observed between when the HW generates the
ENDPTCOMPLETE interrupt and updating the dTD status bits. This
delay is causing the request ending up in lying in the DCD queue
which leads to data stall on that particular endpoints.

As temporary workaround add 10 micro second delay upon request
dequeue failure and check for active status bit clear again which
might help this case.

CRs-fixed: 317926
Change-Id: I81885d33b53b047e9f9c80948dc43cdb7d27532e
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>