Commit 4dfd0df7 authored by Srinivas Kandagatla's avatar Srinivas Kandagatla
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mmc: mmci: Add Qcom datactrl register variant 



Instance of this IP on Qualcomm's SOCs has bit different layout for datactrl
register. Bit position datactrl[16:4] hold the true block size instead of power
of 2.

Signed-off-by: default avatarSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent d5756547
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