Commit 28b7fe76 authored by Siddartha Mohanadoss's avatar Siddartha Mohanadoss
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thermal: msm_tsens: Fix clearing interrupt bit on resume 



Clear the Lower/Upper threshold interrupt bit on resume. Having
the interrupt bit set prevents interrupts from being triggered
when TSENS block is enabled before it goes into suspend.

CRs-Fixed: 322042
Change-Id: Ida283fb2bbbed8032f2c72efc4e5015eb5f43ac9
Signed-off-by: default avatarSiddartha Mohanadoss <smohanad@codeaurora.org>
parent ec6fd7af
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