Commit e3770034 authored by Manivannan Sadhasivam's avatar Manivannan Sadhasivam
Browse files

clk: qcom: Add A7 PLL support



Add support for PLL found in Qualcomm SDX55 platforms which is used to provide
clock to the Cortex A7 CPU via a mux. This PLL can provide high frequency clock
to the CPU above 1GHz as compared to the other sources like GPLL0.

Signed-off-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
parent d8773236
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please to comment