Commit 7aef0872 authored by Rajendra Nayak's avatar Rajendra Nayak Committed by Nicolas Dechesne
Browse files

clk: qcom: cpu-8996: Add support to switch to alternate PLL



Each of the CPU clusters on msm8996 are powered via a primary
PLL and a secondary PLL. The primary PLL is what drives the
CPU clk, except for times when we are reprogramming the PLL
itself, when we temporarily switch to an alternate PLL.
Use clock rate change notifiers to support this.

Signed-off-by: default avatarRajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: default avatarIlia Lin <ilialin@codeaurora.org>
parent 4ec07d2e
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please to comment