Commit 3567962d authored by Manivannan Sadhasivam's avatar Manivannan Sadhasivam
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ARM: dts: qcom: sdx55: Add support for A7 PLL clock 



On SDX55 there is a separate A7 PLL which is used to provide high
frequency clock to the Cortex A7 CPU via a MUX.

Signed-off-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
parent 973b4980
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