Commit 0962b92c authored by Huaibin Yang's avatar Huaibin Yang
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msm: display: add 8064 clock scaling 



Mdp core clk table was set to max during bringup, now add scaling for
use cases.

Change-Id: I311510e72e3c6fdf8459df5284b29d65c082e8d1
Signed-off-by: default avatarHuaibin Yang <huaibiny@codeaurora.org>
parent 53e4d589
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